In: CPN, Aarhus, Denmark, 10-12 June 1998 / Jensen, K.: Daimi PB-532: Workshop on Practical Use of Coloured Petri Nets and Design, pages 15-30. Aarhus University, 1998.
Abstract: We describe aspects of modelling a generic superscalar processor architecture using Coloured Petri nets, for the purpose of analysis of its real-time properties, such as Worst Case Execution Time for a block of instructions. the model can be simulated within the Design/CPN environment. The results of the simulation are displayed using a custom graphics tool written in Tcl/Tk.
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