In: Lectures on Concurrency and Petri Nets: Advances in Petri Nets, pages 345-401. Volume 3098 of Lecture Notes in Computer Science / Jörg Desel, Wolfgang Reisig, Grzegorz Rozenberg (Eds.) --- Springer-Verlag, June 2004.
Abstract: As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call for new approaches in the area of behavioural models. This paper focuses on some of recent developments and new opportunities for Petri nets in designing asynchronous circuits such as synthesis of asynchronous control circuits from large Petri nets generated from front-end specifications in hardware description languages. These new methods avoid using full reachability state space for logic synthesis. They include direct mapping of Petri nets to circuits, structural methods with linear programming, and synthesis from unfolding prefixes using SAT solvers.
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