In: Proceedings of the Canadian Conference on Very Large Scale Integration, pages 7.1-7.6. November 1993.
Abstract: Asynchronous techniques have been rediscovered as an attractive alternative to digital design due to the development of new formalisms such as signal transition graphs, CSP programs, and event labelled structures. Until recently the main research was expended in the area of delay-insensitive circuits for which only sequence and not timing is sufficient to describe a system's behaviour. In this paper the design of interfaces in microprocessor-based systems is explored in the context of a timed asynchronous design. An extension of signal transition graphs is used not only to specify the timed behaviour of the interface protocols found in microprocessor chips but also to design the the interface control path. A methodology is proposed to deal with the time constraints that crop up in the protocols of ordinary microprocessor families: environmental constraints are transformed into constraints on the interface delays which can be found ahead of the implementation stage. A physical implementation of the interface is correct if it satisfies such set of interface path delay constraints.
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