In: Proceedings of XXIIIrd International Autumn Colloquium. Ostrava, MARQ, pages 129-134. 2001. ISBN 80-85988-61-5.
Abstract: The Petri net simulation using its hardware implementation by FPGA with the help of the Xilinx Foundation program system simulation aids is presented. The global Petri net structure is described by basic architecture blocks (places, transitions and the random choice block for more enabled transitions), the structure of these blocks and their communications is presented. The way of construction of the concrete Petri net model is expressed. Simulation results for the dinning philosophers example are presented.
Keywords: Petri Net, hardware implemntation, FPGA, random selection of transition to be fired.