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DSP-architecture design with a Petri-net-based simulator.

Rautiola, K.; Jokitalo, P.

In: Microprocessing and Microprogramming, Vol. 32, No. 1-5, pages 565-572. 1991.

Abstract: Performance requirements of the digital signal processing application are often given in terms of throughputs and response times. The maximum performance depends on both parallelism inside algorithms and architecture and manufacturing technology. The authors have used a Petri-net based simulation tool (ADAS) to investigate how parallelism in the implementation of the Viterbi-algorithm affects the throughput and response time. They describe the evaluation of the 12 different amounts of parallelism in their implementations of the Viterbi-algorithm. (17th EUROMICRO Symposium on Microprocessing and Microprogramming. Hardware and Software Design Automation, 2-5 Sept. 1991, Vienna, Austria)


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