In: Proc. High Performance Computing (HPC'2000); 2000 Advanced Simulation Technologies Conference, 16-20 April 2000, Washington, DC, pages 383-388. 2000. Available at ftp://ftp.cs.mun.ca/pub/publications/00-HPC.ps.Z.
Abstract: The paper compares the performance of two popular approaches to instruction-level multithreading, fine-grain multithreading and block multithreading. Timed Petri nets are used for instruction-level modeling of multithreaded architectures. The results of simulation of derived net models are presented to compare the performance of the two approaches.
Keywords: block multithreaded architectures, event-driven simulation, fine-grain multithreaded architectures, performance comparisons, timed Petri nets.