In: 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3, pages 154-pp. 2005. http://doi.ieeecomputersociety.org/10.1109/IPDPS.2005.72.
Abstract: Dynamic Reconfigurable Systems (DRS) offer a very interesting alternative for embedded digital systems design. Tasks scheduling within a reconfigurable environment allows the development of systems with better execution performance, chip area economy and lower power consumption. This paper describes an algorithm for design of dynamically reconfigurable systems where tasks scheduling have as prime objective the overall application performance speedup. The methodology includes the generation of an embedded controller supporting the scheduling process in a target architecture.