In: International Journal on Software Tools for Technology Transfer (STTT), 2006. July 2006. URL: http://dx.doi.org/10.1007/s10009-006-0012-z.
Abstract: We present and discuss a tool that can estimate the worst-case memory usage of interacting software components. The tool applies formal analysis based on Coloured Petri nets (CPN). For a given set of interaction scenarios, the tool calculates a state space of a CPN model and finds a path, which corresponds to a worst-case memory usage interleaving of the events in the scenarios. To hide the formal analysis from the users of the tool, IBM Rational Rose is used as front-end to specify scenarios as annotated UML sequence diagrams, and Microsoft Excel is used as back-end to present the analysis results.
Keywords: UML; Coloured Petri nets; Formal methods in practice; Embedded systems; Industrial case study.