In: Proceedings of the XIII IFIP WG 10.5 Conference on Computer Hardware Description Languages and Their Applications (CHDL'97), pages 86-88. Chapman & Hall, April 1997.
Abstract: Petri Nets (PNs) prove to be an efficient methodology to model discrete-event systems with parallel activities. The main advantages lie on the graphical interface and on the availability of a set of techniques for formal analysis, including the validation and the test of the modelled system. A proposal to modify the normal PN behaviour is presented, which aims a fast specification of synchronous parallel digital systems, including both the data path and the control unit. A CAD environment, SOFHIA, was developed to model digital systems, to validate their properties and to simulate their behaviour. The environment includes the automatic generation of VHDL code to allow simulation and synthesis on existing CAD tools.
Keywords: Petri Nets; Digital Systems; VHDL; CAD Tools.
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