In: Proceedings of the European Conference on Circuit Theory and Design, 1989, Brighton, UK, pages 629-633. London, UK: IEE, 1989.
Abstract: A new environment is presented for the description and analysis of both synchronous and asynchronous VLSI networks at the top levels of abstraction. Its model is based on two paradigms, the Applicative State Transition concept of Backus, and the theory of single token Time Petri Nets. These paradigms combined provide an effective framework for the high level description, simulation and compilation of VLSI networks. The Design Description Language of the model fully supports the description of parametrized designs through its object-oriented nature.
Keywords: high level description (and) analysis (of) VLSI network; single token time net; applicative state transition concept; object-oriented.
Back to the Petri Nets Bibliography